Skip to content

CDAC Interview Questions and Answers (2026)

CDAC is a government R&D organization whose Project Engineer/Associate hiring runs on its own recruitment written exam and interview - a genuinely different process from C-CAT, which is only the entrance test for its PG-Diploma training courses.

Round Duration What they test
Eligibility & academic screening - Qualification, category, and notification-specific eligibility criteria
Recruitment written exam ~3 hours English, reasoning, aptitude, general awareness, and technical MCQs (~100 questions)
Technical/Personal Interview 20-30 min Domain fundamentals, project/thesis discussion, fit for the role
Document Verification Varies Certificates, category, and experience proof checked before joining

Before the written exam, CDAC screens applications against the notification’s qualification, discipline, and category criteria. This isn’t a test - it’s a filter on your application details, so accuracy on the application form matters.

Common questions

  • N/A - this stage checks eligibility against the notification, not a test with questions

CDAC’s own written exam for employment (distinct from C-CAT, which is only for its training-course admissions) is a roughly 3-hour, ~100-question objective paper spanning English, reasoning, quantitative aptitude, general awareness, and technical MCQs in your specialization.

Common questions

  • Quantitative aptitude and logical reasoning at a standard competitive-exam level
  • English comprehension and grammar
  • General awareness, including current developments in computing/technology
  • Core technical MCQs at B.E./B.Tech level in your discipline (CS/IT: data structures, OS, networks, DBMS; Electronics: digital circuits, microprocessors)

Shortlisted candidates go through a single interview covering core subject fundamentals and a detailed discussion of your final-year or M.Tech project/thesis, often connected back to CDAC’s active research areas.

Common questions

  • Core technical questions in your specialization (data structures/OS/networks for CS/IT; digital electronics/embedded systems for ECE)
  • Detailed walkthrough of your final-year or M.Tech project/thesis - methodology, results, what you’d change
  • How does your project or research interest connect to CDAC’s work in HPC, AI, or cybersecurity?
  • Why CDAC over a private product or service company?

Sample answer frameworks are on the CDAC HR interview questions page.

A final administrative stage where certificates, category proof, and experience documents are checked before a formal offer. Candidates sometimes overlook this step, but incomplete or mismatched documents can hold up or cost an offer even after clearing the interview.

Common questions

  • N/A - this stage verifies documents, not a test with questions

Why C-CAT and CDAC recruitment are different products

Section titled “Why C-CAT and CDAC recruitment are different products”

It’s easy to conflate the two because both carry the CDAC name, but C-CAT is purely an admission test for CDAC’s own PG-Diploma training courses (like PG-DAC and PG-DITISS) - it has nothing to do with getting hired at CDAC. CDAC’s employment recruitment for Project Engineer, Project Associate, and Scientist-level posts runs its own separate written exam and interview. Confusing the two leads candidates to prep for the wrong test entirely, so check whether the notification you’re applying to is a training-course admission (C-CAT) or an employment recruitment drive before you start preparing.

Common technical interview questions and answers

Section titled “Common technical interview questions and answers”
Q: What is the difference between a process and a thread?

A process is an independent execution unit with its own virtual address space, file descriptors, and memory protections, so one process cannot corrupt another’s memory. A thread is a lighter unit of execution inside a process that shares the code, data, and heap segments with its sibling threads, keeping only its own stack, registers, and program counter. Context switching between threads is cheaper because the page tables and TLB do not need flushing, whereas a process switch does. The tradeoff is safety: threads communicate through shared memory and therefore need synchronisation such as mutexes to avoid race conditions, while processes need explicit IPC - pipes, message queues, shared memory segments, or sockets.

Q: Compare a binary search tree, a balanced tree, and a hash table

A plain binary search tree gives O(log n) search, insert and delete on average, but degrades to O(n) when keys arrive in sorted order and the tree becomes a linked list. Self-balancing variants fix this: an AVL tree keeps subtree heights within one and guarantees O(log n) worst case with faster lookups, while a red-black tree balances more loosely and so does fewer rotations on insert, which is why it backs most standard-library maps. A hash table gives O(1) average lookup but O(n) worst case under adversarial collisions, and it provides no ordering. The deciding question in interviews is whether you need ordered traversal or range queries - if yes, use a balanced tree; if you only need point lookups, use a hash table.

Q: Explain the difference between TCP and UDP

TCP is connection-oriented: it sets up a connection with a three-way handshake, numbers every byte, acknowledges receipt, retransmits losses, reorders out-of-sequence segments, and applies flow control via a sliding window plus congestion control through slow start and congestion avoidance. UDP is connectionless and does none of that - it adds only ports and an optional checksum on top of IP, so it is far lower overhead with an 8-byte header versus TCP’s 20-byte minimum. TCP is the right choice where every byte matters: HTTP, SSH, file transfer, email. UDP wins where late data is useless anyway: live video and voice, DNS queries, and gaming, and it is also the base QUIC builds on to get TCP-like reliability with faster connection setup.

Q: What are the ACID properties, and what is an index?

Atomicity means a transaction either fully commits or fully rolls back, implemented through the write-ahead log and undo records. Consistency means the database moves from one valid state to another, honouring constraints and triggers. Isolation means concurrent transactions do not observe each other’s partial work, enforced through locking or MVCC at levels from read-uncommitted up to serializable. Durability means a committed transaction survives a crash, guaranteed by flushing the log to stable storage before acknowledging the commit. An index is a separate structure, usually a B+ tree, that maps column values to row locations so a lookup becomes O(log n) instead of a full table scan; the cost is extra storage plus slower inserts, updates and deletes, since every write must also maintain the index.

Q: Explain the difference between a latch and a flip-flop, and how a microprocessor handles interrupts

A latch is level-triggered - it stays transparent and follows its input for the entire time the enable signal is asserted - while a flip-flop is edge-triggered and samples the input only at a clock transition, which is what makes synchronous design predictable. A D flip-flop is typically built from two latches in a master-slave arrangement driven by opposite clock phases. On interrupts, the processor finishes the current instruction, saves the program counter and status flags onto the stack, looks up the vector table for the handler address, and jumps to the ISR, restoring context on return. Maskable interrupts can be disabled through the interrupt-enable flag, while non-maskable interrupts such as a power-fail signal cannot - that distinction, and keeping ISRs short so they do not block other interrupts, is the standard follow-up.

Q: What is Amdahl’s law and why does it matter for HPC?

Amdahl’s law states that the maximum speedup from parallelising a program is limited by its serial fraction: speedup = 1 / (s + (1 - s) / N), where s is the serial fraction and N the number of processors. If 10 percent of a program is inherently serial, then even with infinite processors the speedup caps at 10x - which is why optimising the serial portion often matters more than adding cores. Gustafson’s law offers the complementary view: in practice problem sizes grow with the machine, so scaled speedup is more achievable than Amdahl’s fixed-size pessimism suggests. This is directly relevant to CDAC’s HPC work on the PARAM supercomputers, where communication overhead in MPI and load imbalance across nodes usually bite before the theoretical limit does.

Q: Explain symmetric versus asymmetric encryption and where each is used

Symmetric encryption uses one shared secret key for both encryption and decryption - AES is the standard, typically at 128 or 256 bits - and it is fast enough to encrypt bulk data at gigabits per second. Its weakness is key distribution: two parties who have never met cannot safely agree on a shared key over an open channel. Asymmetric encryption solves that with a mathematically linked key pair - RSA or elliptic-curve - where the public key encrypts and only the private key decrypts, but it is orders of magnitude slower and limited in the size it can encrypt directly. Real protocols therefore combine both: TLS uses asymmetric cryptography (or Diffie-Hellman) only to authenticate and agree on a session key, then switches to symmetric AES for the actual data. Hashing, such as SHA-256, is a third and separate primitive - one-way and used for integrity and password storage, never for encryption.

Q: What distinguishes a real-time operating system from a general-purpose one?

An RTOS is designed for deterministic worst-case latency rather than average throughput, so its scheduler is typically preemptive priority-based with bounded interrupt latency and bounded context-switch time. A general-purpose OS optimises fairness and throughput, which makes any individual task’s completion time unpredictable. Hard real-time means a missed deadline is a system failure - flight control, an anti-lock braking controller - while soft real-time means a missed deadline degrades quality, like a dropped video frame. A classic RTOS problem is priority inversion, where a low-priority task holding a mutex blocks a high-priority task; the standard fixes are priority inheritance, which temporarily raises the holder’s priority, or a priority ceiling protocol. Common scheduling algorithms are rate-monotonic for fixed priorities and earliest-deadline-first for dynamic ones.

Frequently asked questions about CDAC interviews

Section titled “Frequently asked questions about CDAC interviews”
What is CDAC’s recruitment process?

CDAC (Centre for Development of Advanced Computing) hires for Project Engineer/Associate and Scientist-level roles through its own recruitment written exam, not through the C-CAT test (which is a separate admission test for CDAC’s PG-Diploma training courses like PG-DAC): 1. Eligibility and academic-record screening against the notification. 2. A written exam - typically ~100 objective questions across English, Reasoning, Aptitude, General Awareness, and Technical subjects for your discipline, around 3 hours. 3. A Technical/Personal Interview on domain fundamentals and your project work. 4. Document verification - certificates, category, and experience proof checked before joining.

Is C-CAT the same test used for CDAC job recruitment?

No - this is a common mix-up. C-CAT (CDAC Common Admission Test) is the entrance exam for admission into CDAC’s own PG-Diploma training courses (PG-DAC, PG-DITISS, and similar), not for CDAC’s own employment recruitment. When CDAC hires Project Engineers, Project Associates, or Scientists as an employer, it runs a separate recruitment written exam and interview - candidates and course graduates alike still need to go through that employment process to get hired at CDAC itself.

What questions are asked in the CDAC recruitment written exam and interview?

The written exam covers English, reasoning, quantitative aptitude, general awareness, and technical MCQs at B.E./B.Tech level in your specialization (CS/IT/Electronics, etc.). The interview goes deeper into core subject fundamentals and your final-year or M.Tech project/thesis, often tied to CDAC’s active research areas like HPC, AI, and cybersecurity.

How many rounds are there in CDAC recruitment?

Typically three effective stages: academic/eligibility screening, a written exam, and a Technical/Personal Interview, followed by document verification for selected candidates. There’s no separate HR round - motivational and fit questions are usually folded into the same interview as the technical discussion.

How should I prepare for a CDAC interview?

Prepare aptitude, reasoning, and English for the written exam, revise core fundamentals of your specialization (CS/IT/Electronics) at B.E./B.Tech depth, and be ready to discuss your final-year or M.Tech project/thesis in detail, since interviewers often connect it to CDAC’s ongoing research areas. Also keep your certificates and category documents ready, since document verification is a real, often overlooked stage.

Does completing CDAC’s PG-DAC course guarantee a job at CDAC?

No. PG-DAC and CDAC’s other PG-Diploma courses are separate training programmes with their own placement support (a Common Campus Placement Programme where outside companies visit CDAC centres) - completing one doesn’t automatically place you at CDAC as an employer. To work at CDAC itself, you still apply through its regular Project Engineer/Associate recruitment written exam and interview like any other candidate.

Looking for placement papers, OA practice, or coding questions?

Section titled “Looking for placement papers, OA practice, or coding questions?”